4661de11d3ec4b6aa72449ae38135be3

Supervisor: Germain PHAM

Project topics : Microelectronics and Electrical engineering

Memristive devices are a type of non-volatile memory that has the potential to revolutionize the way we store data. They are very small and energy-efficient, and they can be used to create high-density memory chips. Memristive devices can be implemented using very different technologies [Rajendran16] : Resistive random-access memory (RRAM), Magnetoresistive random-access memory (MRAM), Ferroelectric random-access memory (FRAM), Phase-change memory (PCM),…​

Project description

Though memristive devices are still under development, they have the potential to be used in a wide range of applications, in particular their features (non-volatile, programmable) make them ideal for use in neuromorphic computing [Staudigl22][Woo18][Yang22][Saleh22][Wang22].

Memristors can be used to implement artificial synapses in neuromorphic computers. The memristor’s resistance value can be used to store the weight of the synapse. The memristor’s resistance can then be used to control the strength of the connection between two neurons.

The setting phase is the process of programming the memristor to a specific resistance value. This is done by applying a voltage across the memristor. The voltage must be of sufficient magnitude and duration to cause the memristor to switch to the desired resistance state. Once the memristor has been set to a specific resistance value, it will retain that value even in the absence of power.

Then using the memristor as a synapse can be done by applying a small voltage across the memristor and measuring the current that flows through it.

The simulation of this process is a crucial step in the design of memristive networks and extensive research has been conducted on the influence of memristor device non-idealities on neural network performance [Singh23].

The goal of this project is to use the MLP+NeuroSim framework [MLPNeuroSim] to simulate the training of a memristive network.

MLP+NeuroSim is a circuit-level framework for memristive neural networks. It is a tool that can be used to simulate the training of a memristive network. (Do not confuse it with Neurosim [Neurosim] which is a simulator for teaching neuroscience and simulates neural activity at the cellular and small systems level)

This project is a great choice for students who are interested in learning about new and emerging technologies. It is also a great choice for students who are interested in learning how to implement machine learning on chip.

This project is challenging, but it is also achievable for students who are willing to put in the effort. You will learn a lot about memristive devices, electrical simulation and C++ in the process of completing this project.

Required skills

This project requires a good knowledge of electrical engineering and C++ programming.

  • Mandatory

    • C++ programming experience (compiling with non-standard libraries)

    • practical elements of git

    • Linux OS basics (usage of terminal command lines)

  • Optional

    • Basic knowledge of machine learning algorithms

Workplan (5 weeks)

gantt
title ICS Project: NeuroSim
dateFormat DD/MM/YYYY
excludes weekends
axisFormat %e %b %y
tickInterval 1week
weekday monday
todayMarker off

section Week1 - Setup Simulation environment on Linux
Bibliography analysis - Memristive technologies: 26/02/2024, 10d
Compile MLP simulator (+NeuroSim): 26/02/2024, 1d
Run simulation examples: 27/02/2024, 2d
Deliverable report - Simulation examples: milestone, 29/02/2024, 2d
section Week2 - Software architecture analysis
Software architecture analysis: 04/03/2024, 3d
Learning algorithms implementation analysis: 07/03/2024, 2d
Deliverable report - Memristive technologies: milestone, 08/03/2024, 1d
section Week3+4 - Implementation of sign-SGD
sign-SGD/"ManhattanRule" bibliography: 11/03/2024, 5d
Implementation of sign-SGD: 18/03/2024, 5d
section Week5 - Open source contribution
Code refactoring and documentation: 25/03/2024, 2d
Github pull request: milestone, 27/03/2024, 1d
Slides preparation: 28/03/2024, 1d
Project defense: milestone, 29/03/2024, 1d

Location

School

Télécom Paris trains its students to innovate in today’s digital world. Its training and research cover all fields of information and communication sciences and technologies with a strong societal foundation in order to address the major challenges of the 21st century. Its offers engineering, PhD and professional degree programs, with international students accounting for 55% of its student body. Its research offers original, multidisciplinary world-class expertise in nine strategic areas: Data Science and Artificial Intelligence — Visual and Audio Computing, Interaction — Digital Trust — Innovation Regulations — Transformation of Innovative Firms — Cyber-Physical Systems — Communication Systems and Networks — Mathematics and Applications — Uses, Participation, Democratization of Innovation.

As a founding member of Institut Polytechnique de Paris and an IMT (Institut Mines-Télécom) school, Télécom Paris is a living laboratory that fosters practical solutions and applications while measuring their impact on society.

location_on Address: 19 place Marguerite Perey, 91120 Palaiseau, France

Research team

The Circuits et Systèmes de Communication (C2S) team is internationally recognized for its ability to integrate digital intelligence into AMS and RF SoCs such as analog-to-digital converters (ADCs) or RF receivers for cognitive radio. By combining its expertise in the physical realization of the CMOS chip with its experience in signal processing and its knowledge of the other network layers for which LTCI’s skills are recognized, the group designs high-performance AMS and RF SoCs. The aim is to develop elements or "building blocks", enabling the system of connected objects to be interfaced on one side with the physical world via sensors, and on the other side with the system core via communications, in particular RF.

References